Clear bits inside a register

Only clear individual bits and leave the rest untouched.

Note: To clear RX_DR, TX_DS, MAX_RT you must use setBits() !

Parameters

reg	Register where to clear bits
flags	Which bits to set

Flush Rx Fifo

Used in Rx mode. Should not be executed during transmission of acknowledge, that is, acknowledge package will not be completed.

Flush Tx Fifo Used in Tx mode

Get Rx address of pipe

Parameters

pipe	Pipe number

Returns

Address set for pipe

Initialize nRF24-HAL

Call this function before using this class!

Parameters

payload_length

Set fixed payload length in bytes , set 0 for dynamic payload length

Note: Dynamic payload length is not yet implemented

Read Fifo status register

Returns

Fifo Status register

Read received payload

Used in RX mode. Payload is deleted from FIFO after it is read.

Parameters

buffer

buffer where to put payload, should be 32 byte wide

Returns

length of received payload

Read Rx payload width for top of Rx Fifo Note: Flush RX FIFO if the read value is larger than 32 bytes.

Read new status

Note: status will be automatically updated every time a command is issued, so it might not be necessary to call this explicitly.

Returns

Status register

Reuse last transmitted payload

Used in PTX mode. TX payload reuse is active until W_TX_PAYLOAD or FLUSH TX is executed. TX payload reuse must not be activated or deactivated during package transmission.

Set bits inside a register

Only set individual bits and leave the rest untouched

Parameters

reg	Register where to set bits
flags	Which bits to set

Set Ce pin high If Ce was high before the pin won't be set low before waiting for 10us.

Set Rx address for a pipe

Note: pipe 0 and pipe 1 have a 5 byte wide address while pipes 2 to 5 share the upper 4 bytes with pipe 1, so when setting the address of a pipes 2 to 5, only 1 byte (LSB) will be written to SPI.

Parameters

pipe	Pipe number, must be in range 0 to 5
address	Address for which packets will be put into pipe, see description concerning differences by pipe

Set Tx address

Used in PTX mode only. Set RX_ADDR_P0 equal to this address to handle automatic acknowledge if this is a PTX device with Enhanced ShockBurst enabled.

Parameters

address

Address where to send packets

Write payload to be transmitted together with ACK packet

Used in RX mode. Maximum three ACK packet payloads can be pending. Payloads with same Pipe are handled using first in - first out principle. Write payload: 1– 32 bytes. A write operation always starts at byte 0.

Parameters

pipe	Pipe for which the ACK payload is destined, must be in range 0 to 5
buffer	Buffer from where to read the payload
len	How many bytes the payload is wide

Write payload to be send

Parameters

buffer	Buffer from where to read the payload
len	How many bytes the payload is wide