modm API documentation
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#include <modm/driver/radio/nrf24/nrf24_config.hpp>
Public Typedefs | |
typedef FlagsGroup< Feature_t, DynPd_t, FifoStatus_t, Rpd_t, ObserveTx_t, Status_t, RfSetup_t, SetupRetr_t, SetupAw_t, EnRxAddr_t, EnAA_t, Config_t, InterruptFlag_t > | Flags_t |
Public Types | |
enum | Command : uint8_t { Command::R_REGISTER = 0b00000000, Command::W_REGISTER = 0b00100000, Command::R_RX_PAYLOAD = 0b01100001, Command::W_TX_PAYLOAD = 0b10100000, Command::FLUSH_TX = 0b11100001, Command::FLUSH_RX = 0b11100010, Command::REUSE_TX_PL = 0b11100011, Command::R_RX_PL_WID = 0b01100000, Command::W_ACK_PAYLOAD = 0b10101000, Command::W_TX_PAYLOAD_NOACK = 0b10110000, Command::NOP = 0b11111111 } |
enum | Config : uint8_t { PRIM_RX = Bit0, PWR_UP = Bit1, CRC0 = Bit2, EN_CRC = Bit3, MASK_MAX_RT = Bit4, MASK_TX_DS = Bit5, MASK_RX_DR = Bit6 } |
enum | DynPd : uint8_t { DPL_P0 = Bit0, DPL_P1 = Bit1, DPL_P2 = Bit2, DPL_P3 = Bit3, DPL_P4 = Bit4, DPL_P5 = Bit5 } |
enum | EnAA : uint8_t { ENAA_P0 = Bit0, ENAA_P1 = Bit1, ENAA_P2 = Bit2, ENAA_P3 = Bit3, ENAA_P4 = Bit4, ENAA_P5 = Bit5 } |
enum | EnRxAddr : uint8_t { ERX_P0 = Bit0, ERX_P1 = Bit1, ERX_P2 = Bit2, ERX_P3 = Bit3, ERX_P4 = Bit4, ERX_P5 = Bit5 } |
enum | Feature : uint8_t { EN_DYN_ACK = Bit0, EN_ACK_PAY = Bit1, EN_DPL = Bit2 } |
enum | FifoStatus : uint8_t { RX_EMPTY = Bit0, RX_FULL = Bit1, TX_EMPTY = Bit4, TX_FULL = Bit5, TX_REUSE = Bit6 } |
enum | InterruptFlag : uint8_t { MAX_RT = Bit4, TX_DS = Bit5, RX_DR = Bit6, ALL = Bit4 | Bit5 | Bit6 } |
enum | NrfRegister : uint8_t { NrfRegister::CONFIG = 0x00, NrfRegister::EN_AA = 0x01, NrfRegister::EN_RX_ADDR = 0x02, NrfRegister::SETUP_AW = 0x03, NrfRegister::SETUP_RETR = 0x04, NrfRegister::RF_CH = 0x05, NrfRegister::RF_SETUP = 0x06, NrfRegister::STATUS = 0x07, NrfRegister::OBSERVE_TX = 0x08, NrfRegister::RPD = 0x09, NrfRegister::RX_ADDR_P0 = 0x0a, NrfRegister::RX_ADDR_P1 = 0x0b, NrfRegister::RX_ADDR_P2 = 0x0c, NrfRegister::RX_ADDR_P3 = 0x0d, NrfRegister::RX_ADDR_P4 = 0x0e, NrfRegister::RX_ADDR_P5 = 0x0f, NrfRegister::TX_ADDR = 0x10, NrfRegister::RX_PW_P0 = 0x11, NrfRegister::RX_PW_P1 = 0x12, NrfRegister::RX_PW_P2 = 0x13, NrfRegister::RX_PW_P3 = 0x14, NrfRegister::RX_PW_P4 = 0x15, NrfRegister::RX_PW_P5 = 0x16, NrfRegister::FIFO_STATUS = 0x17, NrfRegister::DYNPD = 0x1c, NrfRegister::FEATURE = 0x1d } |
enum | ObserveTx : uint8_t { ARC_CNT = Bit0 | Bit1 | Bit2 | Bit3, PLOS_CNT = Bit4 | Bit5 | Bit6 | Bit7 } |
enum | Pipe : uint8_t { PIPE_0 = 0b000, PIPE_1 = 0b001, PIPE_2 = 0b010, PIPE_3 = 0b011, PIPE_4 = 0b100, PIPE_5 = 0b101 } |
enum | RfCh : uint8_t { RF_CH = Bit0 | Bit1 | Bit2 | Bit3 | Bit4 | Bit5 | Bit6 } |
enum | RfSetup : uint8_t { RF_PWR = Bit1 | Bit2, RF_DR_HIGH = Bit3, PLL_LOCK = Bit4, RF_DR_LOW = Bit5, CONT_WAVE = Bit7 } |
enum | Rpd : uint8_t { RPD = Bit0 } |
enum | RxPwP0 : uint8_t { RX_PW_P0 = Bit0 | Bit1 | Bit2 | Bit3 | Bit4 | Bit5 } |
enum | RxPwP1 : uint8_t { RX_PW_P1 = Bit0 | Bit1 | Bit2 | Bit3 | Bit4 | Bit5 } |
enum | RxPwP2 : uint8_t { RX_PW_P2 = Bit0 | Bit1 | Bit2 | Bit3 | Bit4 | Bit5 } |
enum | RxPwP3 : uint8_t { RX_PW_P3 = Bit0 | Bit1 | Bit2 | Bit3 | Bit4 | Bit5 } |
enum | RxPwP4 : uint8_t { RX_PW_P4 = Bit0 | Bit1 | Bit2 | Bit3 | Bit4 | Bit5 } |
enum | RxPwP5 : uint8_t { RX_PW_P5 = Bit0 | Bit1 | Bit2 | Bit3 | Bit4 | Bit5 } |
enum | SetupAw : uint8_t { AW = Bit0 | Bit1 } |
enum | SetupRetr : uint8_t { ARC = Bit0 | Bit1 | Bit2 | Bit3, ARD = Bit4 | Bit5 | Bit6 | Bit7 } |
enum | Status : uint8_t { TX_FULL = Bit0, RX_P_NO = Bit1 | Bit2 | Bit3, MAX_RT = Bit4, TX_DS = Bit5, RX_DR = Bit6 } |
enum | AddressWidth : uint8_t { Byte2 = 0x00, Byte3 = 0x01, Byte4 = 0x02, Byte5 = 0x03 } |
enum | AutoRetransmitCount : uint8_t { Disable = 0x00, Retransmit1 = 0x01, Retransmit2 = 0x02, Retransmit3 = 0x03, Retransmit4 = 0x04, Retransmit5 = 0x05, Retransmit6 = 0x06, Retransmit7 = 0x07, Retransmit8 = 0x08, Retransmit9 = 0x09, Retransmit10 = 0x0A, Retransmit11 = 0x0B, Retransmit12 = 0x0C, Retransmit13 = 0x0D, Retransmit14 = 0x0E, Retransmit15 = 0x0F } |
enum | AutoRetransmitDelay : uint8_t { us250 = 0x00, us500 = 0x01, us750 = 0x02, us1000 = 0x03, us1250 = 0x04, us1500 = 0x05, us1750 = 0x06, us2000 = 0x07, us2250 = 0x08, us2500 = 0x09, us2750 = 0x0A, us3000 = 0x0B, us3250 = 0x0C, us3500 = 0x0D, us3750 = 0x0E, us4000 = 0x0F } |
enum | Crc { NoCrc = 0, Crc1Byte = 1, Crc2Byte = 2 } |
enum | Mode { Rx, Tx, Invalid } |
enum | RfPower : uint8_t { Minus18dBm = 0x00, Minus12dBm = 0x01, Minus6dBm = 0x02, dBm0 = 0x03 } |
enum | Speed : uint32_t { kBps250 = 250000, MBps1 = 1000000, MBps2 = 2000000 } |
Static Public Member Functions | |
static void | powerUp () |
static void | powerDown () |
static void | setChannel (uint8_t channel) |
static void | setMode (Mode mode) |
static void | setSpeed (Speed speed) |
static Speed | getSpeed () |
static void | setCrc (Crc crc) |
static void | setAddressWidth (AddressWidth width) |
static AddressWidth | getAddressWidth () |
static void | setRfPower (RfPower power) |
static void | setAutoRetransmitDelay (AutoRetransmitDelay delay) |
static void | setAutoRetransmitCount (AutoRetransmitCount count) |
static void | enableInterrupt (InterruptFlag irq) |
static void | disableInterrupt (InterruptFlag irq) |
static void | enableFeatureNoAck () |
static void | disableFeatureNoAck () |
static void | enablePipe (Pipe_t pipe, bool enableAutoAck) |
Enable Rx Pipe and set payload width. More... | |
static void | disablePipe (Pipe_t pipe) |
Disable Rx Pipe and set payload width. More... | |
static Pipe_t | getPayloadPipe () |
Return number of pipe that has payload available. | |
static uint8_t | getRetryCount () |
static constexpr uint32_t | toNum (Speed speed) |
static constexpr uint8_t | toNum (AddressWidth addressWidth) |
static constexpr uint8_t | toNum (Crc crc) |
Static Public Attributes | |
static Mode | currentMode {Mode::Invalid} |
Configuration interface for nRF24L01+
This class allows for configuration of some aspects of the nRF24L01+ wireless modules. It doesn't implement every aspect, but hopefully all the often used ones.
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inheritedstrong |
Enum Values | Documentation |
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R_REGISTER | 1 - 5 data bytes | lower 5 bit = Register address |
W_REGISTER | 1 - 5 data bytes | lower 5 bit = Register address |
R_RX_PAYLOAD | 1 - 32 data bytes |
W_TX_PAYLOAD | 1 - 32 data bytes |
FLUSH_TX | 0 data bytes |
FLUSH_RX | 0 data bytes |
REUSE_TX_PL | 0 data bytes |
R_RX_PL_WID | 1 data bytes |
W_ACK_PAYLOAD | 1 - 32 data bytes | lower 3 bit = Pipe # (000 to 101) |
W_TX_PAYLOAD_NOACK | 1 - 32 data bytes |
NOP | 0 data bytes |
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inheritedstrong |
Enum Values | Documentation |
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CONFIG | |
EN_AA | Enable 'Auto Acknowledgment'. |
EN_RX_ADDR | Enabled RX Addresses. |
SETUP_AW | Setup of Address Widths. |
SETUP_RETR | Setup of Automatic Retransmission. |
RF_CH | RF Channel. |
RF_SETUP | RF Setup Register. |
STATUS | Status Register. |
OBSERVE_TX | Transmit observe register. |
RPD | Received Power Detector. |
RX_ADDR_P0 | Receive address data pipe 0. |
RX_ADDR_P1 | Receive address data pipe 1. |
RX_ADDR_P2 | Receive address data pipe 2. |
RX_ADDR_P3 | Receive address data pipe 3. |
RX_ADDR_P4 | Receive address data pipe 4. |
RX_ADDR_P5 | Receive address data pipe 5. |
TX_ADDR | Transmit address. |
RX_PW_P0 | Number of bytes in RX payload in pipe 0. |
RX_PW_P1 | Number of bytes in RX payload in pipe 1. |
RX_PW_P2 | Number of bytes in RX payload in pipe 2. |
RX_PW_P3 | Number of bytes in RX payload in pipe 3. |
RX_PW_P4 | Number of bytes in RX payload in pipe 4. |
RX_PW_P5 | Number of bytes in RX payload in pipe 5. |
FIFO_STATUS | FIFO Status Register. |
DYNPD | Enable dynamic payload length. |
FEATURE | Feature Register. |
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inlinestatic |
Disable Rx Pipe and set payload width.
pipe | Pipe Number |
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static |
Enable Rx Pipe and set payload width.
pipe | Pipe Number |