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modm::platform::Rcc Class Reference
Platform HAL » Reset and Clock Control (RCC)

#include <modm/platform/clock/rcc.hpp>

Classes

struct  PllConfig
 

Public Types

enum  MsiRange : uint32_t {
  MsiRange::kHz65 = 0b000 << RCC_ICSCR_MSIRANGE_Pos, MsiRange::kHz131 = 0b001 << RCC_ICSCR_MSIRANGE_Pos, MsiRange::kHz262 = 0b010 << RCC_ICSCR_MSIRANGE_Pos, MsiRange::kHz524 = 0b011 << RCC_ICSCR_MSIRANGE_Pos,
  MsiRange::MHz1 = 0b100 << RCC_ICSCR_MSIRANGE_Pos, MsiRange::MHz2 = 0b101 << RCC_ICSCR_MSIRANGE_Pos, MsiRange::MHz4 = 0b110 << RCC_ICSCR_MSIRANGE_Pos
}
 
enum  LseDrive : uint8_t { Low = 0b00, MediumLow = 0b01, MediumHigh = 0b10, High = 0b11 }
 
enum  PllSource : uint8_t { PllSource::Hsi = 0b0, PllSource::Hse = 0b1 }
 
enum  PllMultiplier : uint8_t {
  Mul3 = 0b0000, Mul4 = 0b0001, Mul6 = 0b0010, Mul8 = 0b0011,
  Mul12 = 0b0100, Mul16 = 0b0101, Mul24 = 0b0110, Mul32 = 0b0111,
  Mul48 = 0b1000
}
 
enum  AhbPrescaler : uint8_t {
  Div1 = 0b0000, Div2 = 0b1000, Div4 = 0b1001, Div8 = 0b1010,
  Div16 = 0b1011, Div64 = 0b1100, Div128 = 0b1101, Div256 = 0b1110,
  Div512 = 0b1111
}
 
enum  ApbPrescaler : uint8_t {
  Div1 = 0b000, Div2 = 0b100, Div4 = 0b101, Div8 = 0b110,
  Div16 = 0b111
}
 
enum  SystemClockSource : uint32_t { Msi = 0b00, Hsi = 0b01, Hse = 0b10, Pll = 0b11 }
 
enum  RealTimeClockSource : uint32_t { Disabled = 0, Lse = 0b01 << RCC_CSR_RTCSEL_Pos, Lsi = 0b10 << RCC_CSR_RTCSEL_Pos, RealTimeClockSource::Hse = 0b11 << RCC_CSR_RTCSEL_Pos }
 
enum  RtcPrescaler : uint8_t { Div2 = 0b00, Div4 = 0b01, Div8 = 0b10, Div16 = 0b11 }
 
enum  UsartClockSource : uint8_t { Bus = 0b00, SysClk = 0b01, Hsi = 0b10, Lse = 0b11 }
 
enum  I2cClockSource : uint8_t { Bus = 0b00, SysClk = 0b01, Hsi = 0b10 }
 
enum  Lptim1ClockSource : uint8_t { Bus = 0b00, Lsi = 0b01, Hsi = 0b10, Lse = 0b11 }
 
enum  McoClockSource : uint32_t {
  Disabled = 0b0000 << RCC_CFGR_MCOSEL_Pos, SysClk = 0b0001 << RCC_CFGR_MCOSEL_Pos, Hsi = 0b0010 << RCC_CFGR_MCOSEL_Pos, Msi = 0b0011 << RCC_CFGR_MCOSEL_Pos,
  Hse = 0b0100 << RCC_CFGR_MCOSEL_Pos, Pll = 0b0101 << RCC_CFGR_MCOSEL_Pos, Lsi = 0b0110 << RCC_CFGR_MCOSEL_Pos, Lse = 0b0111 << RCC_CFGR_MCOSEL_Pos,
  Hsi48 = 0b1000 << RCC_CFGR_MCOSEL_Pos
}
 
enum  McoPrescaler : uint8_t {
  Div1 = 0b000, Div2 = 0b001, Div4 = 0b010, Div8 = 0b011,
  Div16 = 0b100
}
 

Static Public Member Functions

template<class... Signals>
static void connect ()
 Connect GPIO signals like MCO to the clock tree.
 
template<Peripheral peripheral>
static void enable ()
 Enable the clock for a peripheral.
 
template<Peripheral peripheral>
static bool isEnabled ()
 Check if a peripheral clock is enabled.
 
template<Peripheral peripheral>
static void disable ()
 Disable the clock for a peripheral.
 
template<uint32_t Core_Hz, uint16_t Core_mV = 3300>
static uint32_t setFlashLatency ()
 
template<uint32_t Core_Hz>
static void updateCoreFrequency ()
 Update the SystemCoreClock and delay variables.
 
static bool enableMsiClock (MsiRange range=MsiRange::MHz2, uint32_t waitLoops=0x10000)
 
static bool enableHsiClock (uint32_t waitLoops=0x10000)
 
static bool enableHsi4Clock (uint32_t waitLoops=0x10000)
 Enable HSI4 clock by dividing HSI16 by 4.
 
static bool enableHsi48Clock (uint32_t waitLoops=0x10000)
 
static bool enableHseClock (uint32_t waitLoops=0x10000)
 
static bool enableHseCrystal (uint32_t waitLoops=0x10000)
 
static bool enableLsiClock (uint32_t waitLoops=0x10000)
 
static bool enableLseClock (uint32_t waitLoops=0x10000)
 
static bool enableLseCrystal (LseDrive drive=LseDrive::Low, uint32_t waitLoops=0x10000)
 
static bool enablePll (PllSource src, const PllConfig &cfg, uint32_t waitLoops=0x10000)
 Configure and enable the PLL.
 
static bool disablePll (uint32_t waitLoops=0x10000)
 Disable PLL.
 
static constexpr uint8_t value (PllMultiplier m)
 
static void setAhbPrescaler (AhbPrescaler prescaler)
 
static void setApb1Prescaler (ApbPrescaler prescaler)
 
static void setApb2Prescaler (ApbPrescaler prescaler)
 
static bool enableSystemClock (SystemClockSource src, uint32_t waitLoops=0x10000)
 
static void setRealTimeClockSource (RealTimeClockSource src, RtcPrescaler prescaler=RtcPrescaler::Div2)
 
static void setUsart1ClockSource (UsartClockSource src)
 
static void setUsart2ClockSource (UsartClockSource src)
 
static void setLpuart1ClockSource (UsartClockSource src)
 
static void setI2c1ClockSource (I2cClockSource src)
 
static void setI2c3ClockSource (I2cClockSource src)
 
static void setLptim1ClockSource (Lptim1ClockSource src)
 
static void setHsi48ClockSource (bool usePll)
 
static void setMcoClockSource (McoClockSource src, McoPrescaler prescaler=McoPrescaler::Div1)
 

Static Public Attributes

static constexpr uint32_t LsiFrequency = 37'000
 
static constexpr uint32_t HsiFrequency = 16'000'000
 
static constexpr uint32_t MsiFrequency = 2'097'000
 Default MSI frequency at boot.
 
static constexpr uint32_t BootFrequency = MsiFrequency
 
static constexpr uint32_t MaxFrequency = 32'000'000
 

Detailed Description

Reset and Clock Control for STM32L0 devices.

This class abstracts access to clock settings on the STM32. You need to use this class to enable internal and external clock sources & outputs, set PLL parameters and AHB & APB prescalers. Don't forget to set the flash latencies.

Author
Niklas Hauser

Member Enumeration Documentation

enum modm::platform::Rcc::MsiRange : uint32_t
strong
Enum ValuesDocumentation
kHz65 

65.536 kHz

kHz131 

131.072 kHz

kHz262 

262.144 kHz

kHz524 

524.288 kHz

MHz1 

1.048 MHz

MHz2 

2.097 MHz (default)

MHz4 

4.194 MHz

enum modm::platform::Rcc::PllSource : uint8_t
strong
Enum ValuesDocumentation
Hsi 

HSI16.

Hse 

HSE.

enum modm::platform::Rcc::RealTimeClockSource : uint32_t
strong
Enum ValuesDocumentation
Hse 

HSE divided by RTC prescaler (2, 4, 8, 16)

Member Function Documentation

template<uint32_t Core_Hz, uint16_t Core_mV = 3300>
static uint32_t modm::platform::Rcc::setFlashLatency ( )
static

Set flash latency for CPU frequency and voltage. Does nothing if CPU frequency is too high for the available voltage.

Returns
maximum CPU frequency for voltage.
Return Values
<=CPU_Frequencyflash latency has been set correctly.
>CPU_Frequencyrequested frequency too high for voltage.
The documentation for this class was generated from the following file: