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modm::platform::DmaBase Class Reference
Platform HAL » Direct Memory Access (DMA)

#include <modm/platform/dma/dma_base.hpp>

Inheritance diagram for modm::platform::DmaBase:
modm::platform::DmaController< 1 > modm::platform::DmaController< 2 > modm::platform::DmaChannelHal< ChannelID, CHANNEL_BASE > modm::platform::DmaController< ID > modm::platform::DmaController< ID >::Channel modm::platform::DmaHal< ID > modm::platform::Dma1 modm::platform::Dma2

Classes

struct  Nvic
 
struct  Nvic< 1 >
 
struct  Nvic< 2 >
 

Public Typedefs

using IrqHandler = void (*)(void)
 

Public Types

enum  Channel {
  Stream0 = 0, Stream1, Stream2, Stream3,
  Stream4, Stream5, Stream6, Stream7,
  Channel0 = Stream0, Channel1 = Stream1, Channel2 = Stream2, Channel3 = Stream3,
  Channel4 = Stream4, Channel5 = Stream5, Channel6 = Stream6, Channel7 = Stream7
}
 
enum  Request : uint32_t {
  Channel0 = (0 << DMA_SxCR_CHSEL_Pos), Channel1 = (1 << DMA_SxCR_CHSEL_Pos), Channel2 = (2 << DMA_SxCR_CHSEL_Pos), Channel3 = (3 << DMA_SxCR_CHSEL_Pos),
  Channel4 = (4 << DMA_SxCR_CHSEL_Pos), Channel5 = (5 << DMA_SxCR_CHSEL_Pos), Channel6 = (6 << DMA_SxCR_CHSEL_Pos), Channel7 = (7 << DMA_SxCR_CHSEL_Pos)
}
 
enum  Priority : uint32_t { Low = 0, Medium = DMA_SxCR_PL_0, High = DMA_SxCR_PL_1, VeryHigh = DMA_SxCR_PL_1 | DMA_SxCR_PL_0 }
 
enum  MemoryDataSize : uint32_t {
  Byte = 0, Bit8 = Byte, HalfWord = DMA_SxCR_MSIZE_0, Bit16 = HalfWord,
  Word = DMA_SxCR_MSIZE_1, Bit32 = Word
}
 
enum  PeripheralDataSize : uint32_t {
  Byte = 0, Bit8 = Byte, HalfWord = DMA_SxCR_PSIZE_0, Bit16 = HalfWord,
  Word = DMA_SxCR_PSIZE_1, Bit32 = Word
}
 
enum  MemoryIncrementMode : uint32_t { Fixed = 0, MemoryIncrementMode::Increment = DMA_SxCR_MINC }
 
enum  PeripheralIncrementMode : uint32_t { Fixed = 0, PeripheralIncrementMode::Increment = DMA_SxCR_PINC }
 
enum  CircularMode : uint32_t { Disabled = 0, CircularMode::Enabled = DMA_SxCR_CIRC }
 
enum  DataTransferDirection : uint32_t { DataTransferDirection::PeripheralToMemory = 0, DataTransferDirection::MemoryToPeripheral = DMA_SxCR_DIR_0, DataTransferDirection::MemoryToMemory = DMA_SxCR_DIR_1 }
 
enum  Signal : uint8_t {
  NoSignal, Ch1, Ch2, Ch3,
  Ch4, Com, Dac1, Dac2,
  Ext_rx, Ext_tx, Rx, Trig,
  Tx, Up
}
 
enum  InterruptEnable : uint32_t { DirectModeError = DMA_SxCR_DMEIE, TransferError = DMA_SxCR_TEIE, HalfTransfer = DMA_SxCR_HTIE, TransferComplete = DMA_SxCR_TCIE }
 
enum  InterruptFlags : uint8_t {
  FifoError = 0b00'0001, DirectModeError = 0b00'0100, Error = 0b00'1000, HalfTransferComplete = 0b01'0000,
  TransferComplete = 0b10'0000, All = 0b11'1101, Global = All
}
 

Public Member Functions

 MODM_FLAGS32 (InterruptEnable)
 
 MODM_FLAGS32 (InterruptFlags)
 

Static Protected Attributes

static constexpr uint32_t memoryMask
 
static constexpr uint32_t peripheralMask
 
static constexpr uint32_t configmask
 

Detailed Description

DMA

Author
Kevin Laeufer
Mike Wolfram

Member Enumeration Documentation

enum modm::platform::DmaBase::CircularMode : uint32_t
strong
Enum ValuesDocumentation
Enabled 

circular mode

enum modm::platform::DmaBase::DataTransferDirection : uint32_t
strong
Enum ValuesDocumentation
PeripheralToMemory 

Source: DMA_SxPAR; Sink: DMA_SxM0AR.

MemoryToPeripheral 

Source: DMA_SxM0AR; Sink: DMA_SxPAR.

MemoryToMemory 

Source: DMA_SxPAR; Sink: DMA_SxM0AR.

enum modm::platform::DmaBase::MemoryDataSize : uint32_t
strong

In direct mode (if the FIFO is not used) MSIZE is forced by hardware to the same value as PSIZE

enum modm::platform::DmaBase::MemoryIncrementMode : uint32_t
strong
Enum ValuesDocumentation
Increment 

incremented according to MemoryDataSize

enum modm::platform::DmaBase::PeripheralIncrementMode : uint32_t
strong
Enum ValuesDocumentation
Increment 

incremented according to PeripheralDataSize

enum modm::platform::DmaBase::Signal : uint8_t
strong

Peripheral signals that can be used in DMA channels

Member Data Documentation

constexpr uint32_t modm::platform::DmaBase::configmask
staticprotectedconstexpr
Initial value:
DMA_SxCR_CHSEL_Msk |
DMA_SxCR_PL_Msk |
DMA_SxCR_CIRC_Msk |
DMA_SxCR_PFCTRL_Msk
constexpr uint32_t modm::platform::DmaBase::memoryMask
staticprotectedconstexpr
Initial value:
DMA_SxCR_MBURST_Msk |
DMA_SxCR_MSIZE_Msk |
DMA_SxCR_MINC |
DMA_SxCR_DIR_Msk
constexpr uint32_t modm::platform::DmaBase::peripheralMask
staticprotectedconstexpr
Initial value:
DMA_SxCR_PBURST_Msk |
DMA_SxCR_PSIZE_Msk |
DMA_SxCR_PINC_Msk |
DMA_SxCR_DIR_Msk
The documentation for this class was generated from the following file: